Dusko S. Jovanovic,
www.djov.net
 

Compact .pdf version
Short biography

Curriculum Vitae

  Born on 6. May 1975. in the city of Obrenovac, near Belgrade, Yugoslavia (now Serbia)
quad nationality Serbian, Dutch
quad education  
March 2006  PhD degree in dependable embedded software from the University of Twente (department of Control Engineering), the Netherlands; thesis  "Designing dependable process-oriented software, a CSP-based approach"
 
March 2001  MSc Engineering degree from the Faculty of Electrical Engineering, University of Belgrade, Serbia (Yugoslavia); since 1997 at the department of Control Engineering. Final project "HIL - Hardware in The Loop"
 
June 1994  Completed High school of Electrical Engineering "Nikola Tesla" in Belgrade, at the department of Computer Engineering, with maximum average grade.
 
Sept 1982 - June 1990  Primary school, with maximum average grade.

Publications		  
 
 
Jobs  
 current        

Research programme assistant and lecturer at Hanze Institute of Technology in Assen Netherlands, specialised in sensor technologies

Requirements manager at Neopost Technologies B.V Netherlands, Document Systems competence center of the Neopost Group

Founder of REAarch intelectual property brand.
2005 - 2006  Research fellow within the Mechatronics Innovation Center (MIC) at department of Control Engineering, the University of Twente, Netherlands
2001 - 2005  Doctoral researcher at the Faculty of Electrical Engineering, University of Twente, the Netherlands, 4-year research project "Design framework for heterogeneous real-time embedded systems".
1998-1999 Software help systems designer/developer, self-employed in Belgrade, Serbia

 

Professional experience
 

 

Personal
 
quad free time and hobbies world dances, singing, skating, woodworks, hypertext knowledge management
personal page
quad world languages English (advanced)
Dutch (active)
Russian (passive)
French and Spanish (basics)
native: Serbian (and ex-Yugoslavia variants: Croatian, Bosnian)

 

Research publications

Selected publications in English:

pdf.GIF (908 bytes) Jovanovic D., "Requirements for a Multidisciplinary Structural-Behavioural Component Model", ICSSEA 2008, Paris, France, 9-11. December 2008

(short 4-page paper representing the summary of my PhD promotion research and the thesis)
pdf.GIF (908 bytes) Jovanovic D.S., Broenink J.F., "Tools and patterns for dependable concurrent software", IEEE EUROCON 2005 conference, Belgrade, Serbia, 21-24. November 2005
 

(A position paper on possible exception handling concepts for concurrent systems based on process orientation)
pdf.GIF (908 bytes) Jovanovic D.S., Orlic B.E., Broenink J.F., "On issues of constructing an exception handling mechanism in CSP-based process-oriented concurrent software", Communicating Process Architectures - CPA 2005, Eindhoven, Netherlands, 2005 (best PhD-student-paper award)


(short 4-page paper on principles of formal verification of software for control systems supported by the gCSP tool)
pdf.GIF (908 bytes) Jovanovic D.S., Liet G.K. and Broenink J.F., "A CSP-based trajectory for designing formally verified embedded control software", IEEE-sponsored 49th conference ETRAN, Budva, Montenegro, 2005
 

pdf.GIF (908 bytes) Jovanovic D.S., Orlic B., Liet G.K. and Broenink J.F., "gCSP: A Graphical Tool for Designing CSP systems", Communicating Process Architectures - CPA 2004, Oxford, United Kingdom, 2004
 

pdf.GIF (908 bytes) Jovanovic D.S., Orlic B.E. and Broenink J.F. "An automated transformation trajectory from a model of a controlling system to the control code", IEEE-sponsored 47th conference ETRAN, Herceg Novi, Montenegro, 2003 (best young-researcher-in-Control-Engineering-paper award)
 

 pdf.GIF (908 bytes) Jovanovic D., Orlic B., Broenink J. and van Amerongen J., "Inexpensive prototyping for mechatronic systems", WESIC 2003, University of Miskolc, Hungary, 2003
 

pdf.GIF (908 bytes) Hilderink G.H., D.S. Jovanovic and J.F. Broenink, "A multimodal robotic control law modeled and implemented by the CSP/CT framework", Communicating Process Architectures - CPA 2003, Enschede, the Netherlands, 2003
 

 

PhD thesis

pdf.GIF (908 bytes) Jovanovic D.S., "Designing dependable process-oriented software, a CSP-based approach", University of Twente, March 2006

 

Graduation thesis (in Serbian)

pdf.GIF (908 bytes) Jovanovic D.S., "HIL - Hardware in the loop", University of Belgrade, March 2001

(almost all my publications in English can be obtained from the Control Engineering publications database;
in case you have problems with the previous link, try the http://www.ce.utwente.nl/rtweb/publications/index.htm wizard, copy&paste JOVANOVIC )

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Engineering development platforms
 
quad embeddable platforms PC/104 and other industrial PC standards, Analog Devices ADSP family, PLC standards, microCHIP microcontroller series, National Instruments I/O
 
quad prog. languages C/C++, Java; background in assembly, Basic, Pascal, Fortran, occam
 
quad modeling languages CSP; UML, background in Booch and Ward-Mellor notation, MASCOT, ROOM
 
quad tools Rational Rose, MS Modeler, Rhapsody; FDR; MS Project, CVS/SVN, Wiki, MS Developer Studio; Matlab/Simulink and a few toolboxes, 20-sim;  MS Office, LaTeX
 
quad OS MS DOS/Windows, elements of Linux and the RTAI real-time extension; familiarity with embedded real-time kernels

 

 

Copyright © 2010 Dusko Jovanovic